1. Field of the Invention
The present invention relates to a method for manufacturing a multilayer wiring substrate having a structure in which a plurality of resin insulation layers and at least one conductor layer are laminated alternately on upper and lower surfaces of an insulation core in a multilayer arrangement.
2. Description of Related Art
In association with recent increasing trends toward higher operation speeds and higher functionality of semiconductor integrated circuit devices (e.g., IC chips) used as, for example, microprocessors of computers, the number of terminals have increased and the pitch between the terminals generally has become narrower. Generally, a large number of terminals are densely arrayed on the bottom surface of an IC chip and are flip-chip-bonded to terminals provided on a motherboard. However, since the terminals of the IC chip differ greatly in pitch from those of the motherboard, difficulty is encountered in bonding the IC chip directly onto the motherboard. Thus, according to an ordinarily employed method, a semiconductor package configured such that the IC chip is mounted on an IC chip mounting wiring substrate is fabricated, and the semiconductor package is mounted on the motherboard.
The IC chip mounting wiring substrate which partially constitutes such a semiconductor package has been put into practice in the form of a multilayer wiring substrate configured such that buildup layers are formed on the front and back surfaces of a substrate core. See, for example, Japanese Patent Application No. 2010-153839. The substrate core used in the multilayer wiring substrate is, for example, a resin substrate (e.g., glass epoxy substrate) formed by impregnating reinforcement fiber with a resin. By utilizing a rigid substrate core, resin insulation layers and conductor layers are laminated alternately on the front and back surfaces of the substrate core, thereby forming respective buildup layers. In the multilayer wiring substrate, the substrate core serves as a reinforcement and is formed very thick compared to the buildup layers. Specifically, the substrate core is formed to have a thickness of, for example, about 400 μm. Also, the substrate core has through-hole conductors penetrating therethrough for electrical communication between the buildup layers formed on the front and back surfaces.
In recent years, in association with the implementation of high operation speeds of semiconductor integrated circuit devices, signal frequencies have become those of a high frequency band. In cases where such high signal frequencies are used, when the length of through-hole conductors penetrating through a substrate core increases, the through-hole conductors serve as sources of high inductance. This leads to transmission loss of high-frequency signals and circuitry malfunction, which hinders the implementation of high operation speeds.